Voltage regulation is commonly required to prevent variation in the supply voltage powering various microelectronic components such as digital ICs, semiconductor memories, display modules, hard disk drives, RF circuitry, microprocessors, digital signal processors and analog ICs, especially in battery-powered applications such as cell phones, notebook computers and consumer products.
Since the battery or DC input voltage of a product often must be stepped-up to a higher DC voltage, or stepped-down to a lower DC voltage, such regulators are referred to as DC-to-DC converters. Step-down converters, commonly referred to as “Buck converters,” are used whenever a battery's voltage is greater than the desired load voltage. Step-down converters may comprise inductive switching regulators, capacitive charge pumps, and linear regulators. Conversely, step-up converters, commonly referred to as “boost converters,” are needed whenever a battery's voltage is lower than the voltage needed to power its load. Step-up converters may comprise inductive switching regulators or capacitive charge pumps.
Another type of converter may operate as either a step-up or a step-down converter depending on whether the power input to the converter has a voltage above or below its output voltage. Commonly referred to Buck-boost converters, such circuitry is needed whenever a regulator's input and output are similar in voltage, where variations in the input voltage preclude the use of a simple boost or Buck converter.
One example of such an application requiring both step-up and step-down conversion is supplying a regulated 3.3V output from a lithium ion (Lilon) battery. A Lilon battery exhibits a terminal voltage which decays from 4.2V when fully charged to below 3V when discharged. Since the initial battery voltage is above 3.3V and the final battery voltage is below 3.3V, the converter must be able to step-down initially and step-up later.
Inductive Switching Converters
Of the aforementioned voltage regulators, the inductive switching converter can achieve superior performance over the widest range of currents, input voltages and output voltages. The fundamental principal of a DC/DC inductive switching converter is that the current in an inductor (coil or transformer) cannot be changed instantly and that an inductor will produce an opposing voltage to resist any change in its current.
By using one or more transistors switching at a high frequency to repeatedly magnetize and de-magnetize an inductor, the inductor can be used to step-up or step-down the converter's input, producing an output voltage different from its input. The transistors are typically implemented using MOSFETs with a low on-state resistance, commonly referred to as “power MOSFETs”. Using feedback from the converter's output voltage to control the switching conditions, a constant well-regulated output voltage can be maintained despite rapid changes in the converter's input voltage or its output current.
To remove any AC noise or ripple generated by switching action of the transistors, an output capacitor is placed across the output of the switching regulator circuit. Together the inductor and the output capacitor form a “low-pass” filter able to remove the majority of the transistors' switching noise from reaching the load. The switching frequency, typically 1 MHz or more, must be “high” relative to the resonant frequency of the filter's “LC” tank. Averaged across multiple switching cycles, the switched-inductor behaves like a programmable current source with a slow-changing average current.
Since the average inductor current is controlled by transistors that are biased either as “on” or “off” switches, the power dissipation in the transistors is theoretically small and high converter efficiencies, in the 80% to 90% range, can be realized. Specifically, when an enhancement mode power MOSFET is biased as an on-state switch using a “high” gate bias, it exhibits a linear I-V drain characteristic with a low RDS(on) resistance typically 200 milliohms or less. At a current of 0.5 A for example, such a device will exhibit a maximum voltage drop ID·RDS(on) of only 100 mV despite its high drain current. Its power dissipation during its on-state conduction time is ID2·RDS(on). In the example given the power dissipation during the transistor's conduction is (0.5 A)2·(0.2Ω)=50 mW.
In its off state, an enhancement mode power MOSFET has its gate biased to its source, i.e. so that VGS=0. Even with an applied drain voltage VDS equal to a converter's battery input voltage Vbatt, a power MOSFET's drain current IDSS is very small, typically well below one microampere and more generally nanoamperes. The current IDSS is primarily due to junction leakage.
So a power MOSFET used as a switch in a DC/DC converter is efficient, since in its off condition it exhibits low currents at high voltages, and in its on state it exhibits high currents at a low voltage drop. Excepting switching transients, the ID·VDS product in the power MOSFET remains small, and power dissipation in the switch remains low.
Provided that the transistor switching events (i.e., the time it takes to switch the MOSFET from off to on, and vice-versa) are relatively short compared to the period between switching events, the power loss during switching can in circuit analysis be considered negligible or alternatively treated as a fixed power loss. At multi-megahertz switching frequencies, however, the switching waveform analysis becomes more significant and must be considered by analyzing a device's drain voltage, drain current, and gate bias voltage versus time.
Minimizing Power Loss in Switching Converters
In step-up, step-down or up-down DC-to-DC switching converters, one or more power switch elements are required to control the current and energy flow in the converter circuitry. During operation, these power devices act as power switches, toggling on and off at high frequencies and with varying frequency or duration.
During such operation, these power devices lose energy to self heating, both during periods of on-state conduction and during the act of switching. These switching and conduction losses adversely limit the power converter's efficiency. The efficiency of a converter therefore depends on minimizing the Ion·Von conduction loss in every conducting switch or rectifier diode, and in minimizing the gate drive current need to charge the switch's input capacitance at the desired frequency, also known as CG·VG2 losses.
Other losses include power dissipated during the switching transition, i.e. cross-over conduction, when both voltage and current are simultaneously present, and at higher voltages, output power lost charging and discharging a MOSFET's drain capacitance, as given by the loss for each device, namelyPloss=Pconduction+Pdrive+Pcrossover+Pdrain 
For fast switching transistors operating at low voltages, however, these additional losses are small compared to the gate drive and conduction losses in the converter. As such, the power loss in one switch can be reduced by minimizing the sum of its conduction loss and the gate drive loss, wherePloss≈Pconduction+Pdrive 
For a power MOSFET this relationship can be approximated by the equation
      P    loss    ≈                    I        2            ⁢                        R          DS                ⁡                  (                                    t              sw                        T                    )                      +          I      ·                        V          f                ⁡                  (                                    t              rect                        T                    )                      +                  Q        G            ⁢              V        G            ⁢      f      
In this equation I2RDS represents the conduction loss in a power MOSFET and the ratio (tsw/T) represents the portion of the time the MOSFET is switched fully on and conducting current. The conduction loss term I·Vf represents power dissipated in a diode having a forward voltage Vf. and (trect/T) represents the fraction of time in a period T the diode is conducting current. The term QG·VG·f describes the aforementioned CG·VG2 gate drive loss described in terms of gate charge QG. Gate charge QG is preferred over capacitance CG since the capacitance is highly non-linear and difficult to model accurately. Moreover, using gate charge QG offers greater accuracy is predicting efficiency since in nature charge is always conserved, but capacitance is not.
From the above equation minimizing the power loss in the MOSFET requires minimizing RDS by making the MOSFET larger while minimizing gate drive loss requires minimizing QG. Unfortunately gate charge and capacitance are proportional to a transistor's active area A and inversely proportional to its on-resistance, i.e.
      Q    G    ∝  A  ∝      1          R              D        ⁢                                  ⁢        S            
This relation clarifies an unavoidable tradeoff that exists between gate drive and resistive channel conduction losses in a power MOSFET used as a switching converter. Bigger MOSFETs exhibit lower on-resistance and less conductive loss but are harder to drive, losing efficiency especially at higher switching frequencies f.
To maximize a converter's overall efficiency, one must not only use MOSFETs with lowest possible resistance and the minimum gate input capacitance, but must also employ a minimal number of switching elements, with each MOSFET optimized in size for its nominal operating current and switching frequency.
Non-isolated converter topologies like synchronous Buck and synchronous boost converters exhibit high efficiencies because they employ only two MOSFET switches. Unfortunately, up-down converters typically require four switches and suffer in efficiency as a result. While transformers or coupled inductors may be used to achieve up-down regulator operation and avoid the need for more switches, in non-isolated converter applications, multi-winding inductors are unacceptably large compared to single-winding coils.
Non-Isolated Switching Converter Topologies
FIGS. 1A and 1B illustrate two common switching regulators, a synchronous Buck step-down converter and a synchronous boost step-up converter.
An example of a synchronous Buck converter 1 is shown in FIG. 1A. Converter 1 comprises a power MOSFET 3, an inductor 4, a synchronous rectifier power MOSFET 2, with an intrinsic rectifier diode 7, and a capacitor 5. Operation of MOSFET 3 is controlled by a pulse-width modulation (PWM) control circuit (not shown), driving the gate of MOSFET 3. Synchronous rectifier MOSFET 2 is driven out of phase with MOSFET 3, but MOSFET 2 is not necessarily on the entire time when MOSFET 3 is off.
While the control circuit controlling the converter's operation is referred to as PWM control implying fixed-frequency variable-pulse-width operation, it may alternatively operate in a variable frequency mode where the clock period is allowed to vary, or alternatively alternating between varying and fixed frequency modes depending on load and input conditions.
The energy input from the power source, battery or power input into the DC/DC converter is switched or gated through MOSFET 3. With its positive terminal connected to the battery or input, MOSFET 3 acts like a “high-side” switch controlling the current in inductor 4. Diode 8 is a P-N junction parasitic to MOSFET 3, in parallel to the transistor's drain and source, which remains reverse-biased under normal Buck converter operation.
By controlling the current in the inductor 4 by controlling the switching and on-time of MOSFET 3, the energy stored in the magnetizing field of inductor 4 can be adjusted dynamically to control the voltage on output filter capacitor 5. The output voltage Vout is therefore fed back to the input of PWM controller circuit, which controls the current IL in inductor 4 through the repeated switching of MOSFET 3. Load 6 represents an electrical load connected to the output of converter 1.
Driven out of phase with MOSFET 3, synchronous rectifier MOSFET 2 conducts some portion of the time when MOSFET 3 is off. With its positive terminal connected to the inductor 4, i.e. to node Vx, and its negative terminal connected to circuit ground, MOSFET 2 acts like a “low-side” switch, shunting the current flowing in diode 7. Diode 7 is a P-N junction parasitic to synchronous rectifier MOSFET 2, in parallel to the transistor's drain and source. Diode 7 conducts substantial inductor current only during intervals when both MOSFETs 2 and 3 are off.
Both MOSFETs 2 and 3 are simultaneously off during every switching transition to prevent shorting the input power source to ground. This so-called “break-before-make” (BBM) interval prevents shoot through conduction by guaranteeing that both MOSFETs 2 and 3 do not conduct simultaneously and short or “crow-bar” the input and power source of converter 1. During this brief BBM interval, diode 7 in parallel to synchronous rectifier MOSFET 2 must, along with any parasitic capacitance associated with diode 7, carry the load current IL through inductor 4. Unwanted noise can occur during the transitions associated with BBM operation.
If we define the converter's duty factor D as the time that energy flows from the battery or other power source into the DC/DC converter, i.e. the time during which MOSFET switch 3 is on, then the ratio of output to input voltage in Buck converter 1 is proportionate to its duty factor, i.e.
            V      out              V      in        =      D    ≡                  t        sw            T      where tsw is the time period that MOSFET 3 is turned on during each clock period T.
This relationship for a Buck or synchronous Buck converter is illustrated by curve 21 in FIG. 1C in graph 20. Notice that a Buck converter cannot smoothly reach a zero or unity transfer characteristic without exhibiting some discontinuity at the extremes of D. This phenomenon occurs due to switching delays in the power MOSFET switch and its control and gate drive circuitry.
So long as the Buck converter's power MOSFET 3 is still switching, tsw is limited to some portion of the clock period T, e.g. 5%<D<95%, essentially due to turn-on and turn-off delay within the MOSFET switch and its control loop. For example at a 95% duty factor and a 3 MHz clock frequency, the off time for the high-side MOSFET 3 is only 5% of the 333 nsec period, or just 16 nsec. This means the high side MOSFET 3 must turn off and back on in only 16 nsec—too rapidly to regulate over a 95% output-to-input conversion ratio. This minimum off-time problem impacts both synchronous and non-synchronous Buck converters. This problem is further exacerbated in a synchronous DC/DC converter, since no time remains for the synchronous rectifier MOSFET 2 to turn on and then off again and still exhibit BBM operation.
Referring again to graph 20 in FIG. 1C, above some maximum duty factor Dmax, there is not adequate time to maintain switching operation, and the converter jumps from Dmax to a 100% duty factor, as shown by discontinuity 23. Above Dmax, the converter turns on the MOSFET 2 and leaves it on for the entire period T. The abrupt transition 23 causes a glitch in the output voltage. Thus, at a 100% duty factor, Vout=Vin and all regulation is lost as long as the switching is halted.
A similar effect limits the operation of a synchronous boost converter near the extremes of its range. Synchronous boost converter 10, shown in FIG. 1B includes a low-side power MOSFET 11, a battery-connected inductor 13, an output capacitor 14, and a “floating” synchronous rectifier MOSFET 12 with an intrinsic parallel rectifier diode 16. The gates of the MOSFETs 11 and 12 are driven by break-before-make circuitry (not shown) and controlled by a PWM control circuit (not shown) in response to a voltage VFB that is fed back from the output voltage VOUT across filter capacitor 14. BBM operation is needed to prevent shorting out output capacitor 14.
The synchronous rectifier MOSFET 12 is considered to be floating in the sense that neither its source nor drain terminal is not permanently connected to any supply rail, i.e. ground or Vbatt. Diode 16 is a P-N diode intrinsic to synchronous rectifier MOSFET 12, regardless whether MOSFET 12 is a P-channel or an N-channel device. A Schottky diode may be included in parallel with MOSFET 12 but with series inductance may not operate fast enough to divert current from forward biasing intrinsic diode 16. Diode 17 represents a P-N junction diode intrinsic to N-channel low-side MOSFET 11 and remains reverse-biased under normal boost converter operation.
If we again define the converter's duty factor D as the time that energy flows from the battery or power source into DC/DC converter 10, i.e. during the time that low-side MOSFET switch 11 is on and inductor 13 is being magnetized, then the output to input voltage ratio of a boost converter is proportionate to the inverse of 1 minus its duty factor, i.e.
            V      out              V      in        =            1              1        -        D              ≡          1              1        -                              t            sw                    /          T                    
This relationship for a boost or synchronous boost converter is illustrated by curve 22 in graph 20 of FIG. 1C. Notice that the boost converter cannot smoothly reach a unity transfer characteristic without exhibiting some discontinuity at the extreme low end of D. This phenomenon occurs due to switching delays in the power MOSFET switch and its control and gate drive circuitry.
So long as the boost converter's power MOSFET 11 is still switching, tsw is limited to some portion of the clock period T, e.g. 5%<D<95%, essentially due to turn-on and turn-off delay within the MOSFET 11 and its control loop. For example, at a 5% duty factor and a 3 MHz clock, the off time for the low-side MOSFET 11 is only 5% of the 333 nsec period, or just 16 nsec. This means the low side MOSFET 11 must turn on and back off in only 16 nsec—too rapidly to regulate below a 5% output-to-input conversion ratio. This minimum on-time problem impacts either synchronous or non-synchronous boost converters.
Referring again to graph 20, below some minimum duty factor Dmin, there is not adequate time to maintain switching operation and the converter must jump from Dmin to 0% duty factor as shown by discontinuity 24. Below Dmin, the converter turns on the synchronous rectifier MOSFET 12 and leaves it on for the entire period T. The abrupt transition 24 causes a glitch in the output voltage of boost converter 10. Moreover, at a 100% duty factor, Vout=Vin and all regulation is lost as long as the switching is halted.
So in both synchronous Buck converter 1 and synchronous boost converter 10, operating near a unity transfer characteristic, i.e. where Vout≈Vin, is problematic.
Buck-Boost Switching Converter)
The problem of non-isolated DC/DC switching converter operation near a unity transfer ratio is especially difficult in applications when the input voltage may vary above or below the desired output voltage. Examples of this situation include the output of noisy AC adapters or circuitry which must operate by battery back-up during emergency conditions when a main source of power has failed.
FIG. 2 illustrates another scenario where a conversion ratio above and below unity is required. Graph 25 illustrates the discharge characteristic of a Lilon battery under a constant load current, starting at 4.2V at full charge, decaying rapidly during discharge interval 26, then slowly decaying from 3.7V to 3.5V in interval 27, and finally dropping quickly in interval 28 to its cutoff at below 3V.
In the event that a DC/DC converter is needed to produce a well-regulated 3.3V output during the entire duration, a sub-unity conversion ratio of (3.3V/4.2V), i.e. a ratio of 0.79, is needed at the outset, indicating that a Buck converter is required. At the battery's end-of-life, the conversion ratio exceeds unity becoming 3.3V/3V, i.e. a conversion ratio of 1.1, and requires a boost converter to achieve regulation. Such an application demanding both step-up and step-down conversion requires a Buck-boost, or up-down converter.
In the case where the user wants to avoid the complexities of up-down conversion, one possible approach is to use only a Buck converter and give up some battery life by cutting of the battery early, e.g. at 3.3V. This approach, upon first inspection seems reasonable since the majority of a Lilon battery's life is above 3.5V. Closer analysis of graph 25 reveals some complications with such an approach.
Because of the limitations of Dmax, the converter cannot regulate approaching a unity conversion ratio. If the converter cannot properly regulate below a certain dropout voltage δ where δ=Vbatt(min)−Vout, then the battery cannot be operated all the way down to 3.3V. If for example the drop out of a Buck converter is 300 mV, a converter must cut off operation at 3.6V to guarantee regulation. At 3.6V in and 3.3V out, the switching regulator must operate at a 92% duty factor. Even operating at a duty factor of 92%, which is not an easy task at high frequencies, the majority of the Lilon battery's energy is wasted by using a Buck-only converter solution.
A Buck-boost converter can easily be derived by combining synchronous Buck and boost converters into a merged or cascade circuit. In the schematic diagram of FIG. 3A, for example, a synchronous boost converter 30 comprising a low-side MOSFET 31, an inductor 33, a synchronous rectifier MOSFET 32, an intrinsic diode 35, and a filter capacitor 34, is used to power a synchronous Buck converter comprising a MOSFET 37, an inductor 39, a synchronous rectifier MOSFET 38, an intrinsic diode 42, and a filter capacitor 40, the combined cascade converter 30 collectively driving a load 41. In this approach the input voltage is first stepped-up to a voltage Vy higher than the desired output, then back down to produce Vout.
The overall efficiency of this boost-Buck topology is given by the product of the boost converter's efficiency ηboost multiplied by the Buck converter's efficiency ηBuck. Even if both converters are 85% efficient, the combined cascade converter only reaches roughly 70% overall efficiency. Moreover, the converter as shown requires two inductors, a characteristic highly undesirable from a user's point-of-view.
Conversely in FIG. 3B, a synchronous Buck converter comprising a MOSFET 52, an inductor 53, a synchronous rectifier MOSFET 51, an intrinsic diode 55, and a filter capacitor 54, is used to power a synchronous boost converter comprising a low-side MOSFET 58, an inductor 57, a synchronous rectifier MOSFET 59, an intrinsic diode 62, a filter capacitor 60, and a load 61. The cascade Buck-boost converter 50 first steps down and regulates the input voltage Vy lower than the desired output, then steps this voltage up to produce Vout.
Again, the overall efficiency of the Buck-boost cascade converter 50 is given by the product of the individual efficiencies as given by ηcascade=ηBuck·ηboost. The overall loss in a Buck-boost cascade converter is worse than the loss in a synchronous Buck converter or a synchronous boost converter alone, because there are more transistors in series between the input and output terminals, and because all the MOSFETs are switching all the time. Unlike converter 30, which required two inductors, however, converter 50 has two inductors 53 and 57 connected in series. Since series-connected inductors share the same current, they can be replaced by a single inductor, and doing so also eliminates the need for capacitor 54.
The resulting Buck-boost converter 70 is illustrated in FIG. 4, comprising a single inductor 73, four MOSFETs 71, 72, 76, and 77, a filter capacitor 80, a load 81, a PWM control circuit 83 and a break-before-make and gate buffer circuit 82. An intrinsic diode 74 in parallel with MOSFET 71, and an intrinsic diode 78 in parallel with MOSFET 77 act as rectifiers during certain operating conditions such as BBM intervals, while diodes 75 and 79 normally remain reversed biased. Depending on its terminal conditions, converter 70 can operate in three distinct modes, Buck, boost, and Buck-boost.
With MOSFETs numbered i=1 to 4 representing respectively MOSFETs 71, 72, 76 and 77, the overall total power loss is then given by
      P    total    =            ∑              i        =        1            4        ⁢                  ⁢                  (                              P            conduction                    +                      P            drive                          )            i      
The equation illustrates that all four MOSFETs exhibit conduction losses, in proportion to their on-time, and all four MOSFETs also exhibit switching losses, in proportion to their switching frequency.
In FIG. 5A, schematic diagram 85 represents the operation of Buck-boost converter 70 as a Buck converter where MOSFETs 71 and 72 are switched out of phase under PWM control while MOSFET 77 remains turned-on and MOSFET 76 is biased off. The overall loss in converter 70 is greater than the loss in a synchronous Buck converter because it now includes the conduction loss in MOSFET 77, namely
      P    total    =                    ∑                  i          =          1                2            ⁢                          ⁢                        (                                    P              conduction                        +                          P              drive                                )                i              +                  (                  P          conduction                )            4      
The equivalent circuit 90 of FIG. 5B illustrates MOSFET 72, synchronous rectifier MOSFET 71, parallel rectifier diode 74, inductor 73 and series resistance 91 of fully-enhanced MOSFET 77 shunting diode 78. Off state MOSFET 76 is illustrated as reverse-biased P-N diode 79. The Buck converter mode of Buck boost converter 70 works so long as the criterion Vin>(Vout+δ) is maintained.
Because of series resistance 91 associated with on MOSFET 77, the efficiency of a Buck-boost converter 70 of FIG. 4 operating in a Buck converter mode is lower than that of the simple Buck converter 1 shown in FIG. 1A. This characteristic can be seen in the efficiency graph of FIG. 7, where the Buck-only efficiency (curve 110) is higher, typically 5% to 15% percent higher, than that of the Buck-mode efficiency (curve 107) of a Buck-boost converter.
In FIG. 6A, schematic diagram 95 represents the operation of Buck-boost converter 70 as a boost converter where MOSFETs 76 and 77 are switched out of phase under PWM control while MOSFET 72 remains turned-on and MOSFET 71 is biased off. The converter's overall loss is greater than the loss of a synchronous boost converter because it now includes the conduction loss of MOSFET 72, namely
      P    total    =                    ∑                  i          =          3                4            ⁢                          ⁢                        (                                    P              conduction                        +                          P              drive                                )                i              +                  (                  P          conduction                )            1      
The equivalent circuit 100 of FIG. 6B illustrates switch MOSFET 76, synchronous rectifier MOSFET 77, parallel rectifier diode 78, inductor 73 and series resistance 101 of fully-enhanced MOSFET 72. Diodes 74, 75 and 79 remain reverse-biased and off. The boost converter mode of Buck-boost converter 70 works so long that the criterion Vin<(Vout−δ) is maintained.
Because of series resistance 101 associated with on MOSFET 72, the efficiency of a Buck-boost converter 70 of FIG. 4 operating in boost converter mode 95 is lower than that of the simple boost converter 10 shown in FIG. 1B. This characteristic can be seen in the efficiency graph of FIG. 7, where the boost-only efficiency (curve 111) is higher, typically 5% to 15% percent higher, than the boost-mode efficiency (curve 108) of a Buck-boost converter.
Notice also that boost mode operation efficiency (curve 108) is lower than Buck-mode operation, primarily because boost converters require higher average switch currents than Buck converters, increasing conduction losses. The higher conduction losses in boost converter MOSFETs can be compensated by employing larger lower-resistance power MOSFETs, but only by increasing the input capacitance, gate charge, and gate drive related switching losses, canceling most of the benefit of the lower conduction loss device. The problem is further exacerbated in a Buck-boost converter operating in boost mode, since more series resistance is present at all times due to the resistance 101 related to MOSFET 72.
In between the Buck-only and the boost-only modes, when the converter approaches a unity conversation ratio, the circuit must operate in true Buck-boost mode where all four transistors are switching. That range occurs where the converter exceeds the maximum duty factor Dmax for a Buck converter or falls below the minimum duty factor Dmin, for a boost.
Table 1 summarizes the operation of Buck-boost converter 70 in the Buck, boost and Buck-boost modes:
TABLE 1ModeCriteriaSwitchingFull OnOffBuckVin > (Vout + δ)M1, M2M4M3Buck-Boost(Vout + δ) > Vin >M1, M2, M3, M4nonenone(Vout − δ)BoostVin < (Vout − δ)M3, M4M2M1
The switching converter's Buck-boost mode therefore occurs whenever
            V      out              V      in        <      (          1      ±      δ        )  
Since all four transistors are switching in the Buck-boost mode, the losses are greater than in the Buck-only or boost-only mode. This characteristic is illustrated in FIG. 774, where the efficiency of converter 70 in the Buck-boost mode (curve 106) is lower than the efficiency of Buck-boost converter 70 operating in Buck-only mode (curve 107) and boost-only mode (curve 108), resulting a rapid drop in efficiency whenever four-switch Buck-boost operation commences. As shown, converter 70 operates only in Buck-boost mode when it has to do so, i.e. for Vout/Vin conversion ratios near unity, and by example between 0.9 and 1.1.
In the event that converter 70 must operate constantly in four-switch Buck-boost mode, the efficiency follows curve 112A when stepping down, which is considerably lower than the efficiency in the Buck-only mode (curve 107) and far below the efficiency of a simple synchronous Buck converter (curve 110). Similarly, four-switch Buck-boost operation in the step-up mode follows curve 112B with efficiencies considerably lower than the efficiency in boost-only mode (curve 108) and far below the efficiency of a simple synchronous boost converter (curve 111). So while mode switching of a Buck-boost converter limits the loss four-switch Buck-boost operation to near unity voltage conversion ratios, the Buck-boost converter is categorically less efficient that a Buck converter or a boost converter alone.
Since producing a regulated 3.3V output from a Lilon battery falls close to this ±δ range surrounding a unity voltage conversion ratio, the greatest portion of the Lilon battery's stored energy occurs at a voltage where the Buck-boost converter's efficiency is poorest, in the range of 3.5V to 3.6V. Moreover, the fact that the converter must go through a mode transition whenever the conversion ratio is near unity can be a real problem in a number of applications, affecting transient regulation, stability and noise.
Clearly, the Buck-boost switching regulator has many disadvantages, and especially so when operating at or near unity conversion ratios.
Charge Pump Converters
An alternative to the switched-inductor converter is a charge pump, a voltage conversion circuit using only switches and capacitors to perform voltage translation through repeated charge redistribution, i.e. the continuous charging and discharging of a capacitor network driven by a clock or oscillator.
The advantage of a charge pump is that at specific voltage conversion ratios, it can exhibit extremely high conversion efficiencies approaching 100%. The disadvantage is that it can only efficiently generate voltages that are exact integral multiples of the number of flying capacitors used in its converter circuit. Voltages other than select multiples exhibit low efficiencies.
A common charge pump 150 is illustrated in FIG. 8A, where a single capacitor is employed as a “doubler”, i.e. to double the battery's input voltage. Charge pump 150 comprises four MOSFETs, 152, 153, 154 and 155 configured similar to an H-bridge except that one terminal, the source of MOSFET 154 is connected to the charge pump output VCP and reservoir capacitor 166 rather than to ground.
Charge pump operation can be understood by modeling the MOSFETs as ideal switches where in the equivalent circuits 160 and 180 of FIGS. 8B and 8C, MOSFETs 152, 153, 154 and 155 are represented as switches 162, 163, 164 and 165 respectively. During the charging phase, shown in FIG. 8B, diagonal switches 162 and 165 are closed, driving node Vx to ground and node Vy to Vbatt and charging a flying capacitor 151 to the voltage Vbatt. During the charging cycle, switches 163 and 164 remain open.
In the charge transfer and discharge phase, shown in FIG. 8C, switches 162 and 165 are opened, switches 163 and 164 are closed, and energy is transferred from the flying capacitor 151 to the output reservoir capacitor 166, pumping the VCP voltage to a value twice the battery voltage or 2·Vbatt.
The purpose of the switch network is essentially to place flying capacitor 151 in parallel with the battery during charging and in series, i.e. stacked on top of the battery's positive terminal, during discharging. The cycle then repeats with another charging phase.
A single flying capacitor charge pump is capable of efficiently delivering power only at twice its input, or alternatively if the capacitor is connected to the negative terminal of the battery to produce a mirror-image negative voltage of the battery, i.e. −Vbatt, also known as an inverter.
FIG. 9A illustrates a charge pump 170 utilizing two flying capacitors 173 and 177 and a network of seven MOSFETs 171, 172, 174, 175, 176, 178 and 179. The purpose of the network is to charge the capacitors in series, charge them each to half the battery voltage, i.e. Vbatt/2. After charging, the two charged capacitors are connected in parallel, and connected to the positive terminal of the battery. The resulting output is then Vbatt+Vbatt/2 for an output voltage of 1.5Vbatt. Because the output is 1.5 times its input this charge pump is sometimes referred to as a “fractional” charge pump.
Schematic diagram 183 and 185 in FIGS. 9B and 9C represent the simple switch equivalent model for operating a fractional charge pump where switches 181, 182, 184, 185, 186, 188 and 189 represent MOSFETs 171, 172, 174, 175, 176, 178 and 179, respectively. In the charging cycle, shown in FIG. 9B, switch 181 is closed grounding Vx, switch 189 is closed driving the voltage Vz to the input voltage Vbatt, and switch 185 is closed, i.e. Vy=Vw, thereby placing capacitors 173 and 177 in series. If the capacitors have the same value they will each charge to a voltage Vbatt/2. All the other switches remain open in the charging phase.
In the discharge phase, shown in FIG. 9C, all of the switches are opened, and high-side switches 182 and 186 are closed connecting the Vx and Vw, the negative terminals of the flying capacitors, to Vbatt. At the same time, switches 184 and 188 are closed connecting Vy and Vw, the positive terminals of the capacitors to the output VCP and reservoir capacitor 180. The cycle then repeats constantly either at a fixed or varying frequency.
FIGS. 10A-10D illustrate several charge pump voltage converters possible with switched-capacitor networks, represented during their discharge cycle. In FIG. 10A, a charge pump doubler 200 combines a battery input voltage source 201 with a single flying capacitor 202 stacked atop it, to produce a voltage twice the battery input, i.e. 2·Vbatt. In FIG. 10B, an inverter 205 stacks a single flying capacitor 206 beneath voltage input 207 to produce a below ground output voltage of −Vbatt, essentially a negative mirror image of the input voltage.
In FIG. 10C, a fractional charge pump 210 charges capacitors 212 and 213 to Vbatt/2 then stacks them atop Vbatt voltage source 211 to produce an output 1.5 times its input. Alternatively, in FIG. 10D, capacitors 217 and 218 charged to Vbatt/2, are connected to ground, the same negative terminal of voltage source 216, producing an output voltage of one-half the battery voltage, i.e. +0.5Vbatt. A voltage −0.5Vbatt is also possible by referencing the flying capacitors below ground, i.e. with their positive terminal tied to ground.
As shown, charge pumps with two flying capacitors can produce various integral multiples “n” of one-half their input voltage, or as
      V    CP    =                    n        ·                  (                                    V              batt                        2                    )                    ⁢                          ⁢      where      ⁢                          ⁢      n        =          {                        -          2                ,                  -          1                ,        0        ,                  +          1                ,                  +          2                ,                  +          3                ,                  +          4                    }      
Specifically, when n=+2, the output VCP is equal to the battery voltage Vbatt, behaving identical to a direct battery connection. Operating a two-capacitor fractional charge pump in a single-capacitor converter mode, n=+4 behaves as a doubler where VCP=2·Vbatt, and n=−2 behaves as an inverter, where VCP=−Vbatt. Operating in two-capacitor fractional mode, n=−1 produces VCP=−½Vbatt, n=+1 produces VCP=+½Vbatt, and n=+3 produces VCP=+1.5·Vbatt. When n=0 the converter is off and VCP=0, i.e. grounded or alternatively floating. A fractional charge pump can actually switch among these various inverting, fractional and doubler modes automatically as needed.
A problem with charge pump converters is they operate efficiently only at integral multiples of the number of flying capacitors; in other words, they are not voltage regulators. Specifically, as a desired load voltage Vout drops below the voltage VCP that the capacitor network produces, the converter cannot adapt. The voltage-differential between the charge pump's output voltage VCP and the regulated output voltage of the converter Vout requires a resistor or current source to support the voltage mismatch, and the voltage across that lossy element results in lost power and reduced efficiency. The efficiency equation of the charge pump supplying an output voltage Vout can be expressed by adapting the mathematical form for linear regulator efficiency, herein as
      η          C      ⁢                          ⁢      P        =                    V        out                    V                  C          ⁢                                          ⁢          P                      =                  V        out                    n        ·                  (                                    V              batt                        2                    )                    where n={−2, −1, 0, +1, +2, +3, +4} and where Vout≦VCP.
This efficiency equation for single-mode champ pumps is illustrated graphically in FIG. 11A where Vbatt≡Vin for various integral multipliers, including a doubler (curve 221), an inverter (curve 222), and fractional charge pumps (curves 223, 224 and 225). Curve 226 represents a direct battery connection, identical to a linear regulator's maximum theoretical efficiency, i.e. assuming no quiescent operating current. In each case, as the input to output ratio approaches an integral multiple of ±½Vbatt, the efficiency increases. The charge pump is not capable of delivering a voltage higher than that voltage, and a different capacitor multiplier, i.e. a different operating mode must be employed.
Each curve shown in FIG. 11A represents a specific charge pump circuit, e.g. including those shown previously in FIGS. 8, 9 and 10. Unless a load operates at an exact half-volt integral multiple of the input voltage, however, the efficiency of the charge pump converter will suffer. This behavior is especially problematic for battery powered products where the battery voltage changes markedly as the cell discharges. In the case of Lilon batteries, the voltage can decay more than 1V during discharge, representing a 25% change. Even if the peak efficiency may be high at one specific operating condition and battery voltage, the overall efficiency of the converter averaged over the battery discharge curve is poor. Weighted average efficiencies can be lower than 60% using a single-mode charge pump.
One way to improve the average efficiency of the converter is to switch modes between 1×, 1.5× and 2× automatically within one circuit. This feature is particularly useful to supply a fixed voltage over a wide input range. An example of the efficiency of a mode changing charge pump is illustrated in FIG. 11B, which shows the efficiency as a tri-mode converter circuit switches from 1×-battery-direct mode (curve 247), to 1.5×-fractional-mode (curve 244), and again to a 2×-doubler-mode (curve 241) as the battery decays. By switching modes in this zigzag pattern, the efficiency of the charge pump converter is improved because the output is not pumped to an excessively high value compared to the load, and the overall efficiency improves.
Unfortunately, conditions still exist where the efficiency suffers substantially. The mode transitions exhibit dramatic shifts in efficiency (curve 246) at a conversion ratio of one, and again (curve 243) at a 1.5× conversation ratio. The mode transitions may also result in sudden current and voltage discontinuities, or produce instability or noise. To determine what conversion ratio is required the graph of FIG. 11B also includes curves 248, 249, and 250 relating the required input voltage range and conversion ratios to produce output voltages of 3V, 3.5V and 4V, respectively.
Specifically, the charge pump converter in 1.5× mode does not perform well for conditions slightly above a unity conversion ratio, unfortunately manifesting even lower efficiencies than an inductive Buck-boost converter.
Efficiency of Regulated Charge Pumps
The real issue of charge pump as a power supply is that the charge pump converter is not by itself a voltage regulator since it produces only certain fixed voltage multiples. To regulate its output voltage or output current, the charge pump must produce a voltage greater than the desired output and some pass element must be inserted in series between the load and the output of the charge pump converter. The voltage differential between the charge pump's higher output voltage and a specific desired output voltage must then be supported across this series element. Examples of prior art series-pass elements include linear regulators, current sources, or resistors, all of which are lossy, i.e. dissipate power as heat and reduce the charge pump regulator's overall efficiency. Losses are given by the voltage differential present across the series pass element and the current flowing through such an element.
For example, in schematic diagram 260 of FIG. 12A, a charge pump 262 with capacitors 263 and 264 is powered by a battery or other voltage source 261 to produce a voltage VCP across a reservoir capacitor 265. Since this voltage is higher than a desired output voltage Vout needed to power load 267, a low dropout (LDO) linear regulator 266 must support the difference ΔVLDO while conducting current, thereby dissipating heat and reducing efficiency. Even if the quiescent currents IQCP and IQLDO flowing to ground in charge pump 262 and LDO regulator 266 are zero, the efficiency is still limited to a maximum value of Vout/VCP, the output to input ratio of the LDO pass element. The greater the voltage differential between the charge pump's output VCP and the desired regulated load voltage Vout (i.e. the greater the ΔV across the LDO regulator), the worse the converter's efficiency becomes.
The efficiency problem is not avoided by placing the LDO regulator 282 in front of charge pump 284 as a pre-regulator, as shown in FIG. 12B, since the output voltage VLDO of LDO regulator 282 is necessarily some integral multiple of the charge pump's output voltage VCP, and this voltage differs from Vin by an amount ΔVLDO—a voltage supported across LDO regulator 282 while it is conducting current. The effect is the same as the prior example with LDO post regulation—the series pass element LDO regulator 282 must support a voltage differential across its terminals while conducting current. Even if the quiescent currents IQCP and IQLDO flowing to ground in charge pump 284 and LDO regulator 282 are zero, the efficiency is still limited to a maximum value of VLDO/Vin, the output-to-input ratio of the LDO pass element.
Using a current source instead of an LDO regulator does not improve the efficiency of the circuit. As illustrated in circuit 300 of FIG. 12C, inserting a current source 306 between a load 308 and the output terminal of a charge pump 302 still forces the pass element to support a voltage differential ΔV while it conducts current. This difference between the output of charge pump 302 (VCP) and the voltage across filter capacitor 307 (Vout) must be supported by the conducting current source, and therefore contributes to efficiency loss and wasted power. Even with a 100%-efficient charge pump, the overall converter efficiency is limited to a maximum value of Vout/VCP, the output-to-input ratio across the series pass element, in this case, current source 306.
Incorporating the current source or regulating function into one of the charge pump switches has the same impact on overall regulator efficiency as using a separate regulating element. As shown in schematic diagram 320 of FIG. 12D, a current source 326 represents one switch of a charge pump doubler comprising MOSFETs 322, 323 and 324 and a capacitor 325. A selector switch 327 biases current source 326 as either an “on” current source or an “off” switch, depending on the mode, so that it behaves as a switched current source conducting a fixed current or no current at all. When the current through current source 326 is zero, no power is dissipated in the switched current source 326. When it current source 326 is on and acting as a current source, however, current source 326 must still must dissipate power. Specifically, during conduction, this controlled current source 326 must support a differential voltage Vy−Vout across its terminals. As a consequence, it still dissipates power and degrades efficiency.
Eliminating the series pass device in a charge pump regulator does not improve efficiency. As shown in FIG. 12E, even if no device is intentionally included to support the mismatch between the output voltage Vout and the charge pump's output VCP, a distributed parasitic resistance 346 present in the circuit will necessarily support the ΔV between the load 347 and charge pump 342, and power is lost in this resistance in the form of heat as if a series pass device were intentionally inserted.
Even in the event that somehow the circuit's series resistance was somehow made zero, the voltage differential would appear across one of the MOSFET switches, forcing the device to saturate, and drop the full voltage differential across its terminals while conducting current. In such a case power is still lost, in an amount equal to the differential voltage times the load current, no matter how the differential voltage is distributed throughout the circuit.
So any voltage differential ΔV between a charge pump's output voltage VCP and a regulated load voltage Vout results in loss of efficiency. Only by reducing the voltage differential ΔV across a series pass element, i.e. supplying a regulated voltage very close to the charge pump's output voltage—can efficiency be improved. Dynamically changing among single, fractional and doubler modes helps reduce this differential to certain multiples given by {Vout−VCP}={Vout−n·Vin} where n can change among 1×, 1.5× or 2× modes.
Operating a charge pump near unity voltage conversion ratios where Vout≈Vin and ΔV across a series pass element is small, the efficiency of regulated charge pumps is greatly improved. Unfortunately for small ΔV, another phenomenon referred to as “dropout” can degrade the accuracy and quality of voltage regulation. The problem of dropout also plagues prior art switching regulators.
Dropout in Prior Art Regulators
Whenever the input and the output voltages of a voltage regulator approach one another within the range of several hundred millivolts, i.e. Vout≈Vin±200 mV, the quality of the converter's regulating ability suffers. Loss of regulation quality may be manifest in several ways, either by a one-time or repeated glitch or discontinuity in output voltage, by increased ripple, or by complete loss of regulation within some narrow voltage band. The phenomenon of degraded regulation whenever Vout approaches Vin is referred to as “dropout”, meaning the converter drops out of regulation.
The Buck converter of FIG. 1A and the boost converter of FIG. 1B both momentarily lose regulation as their switching duty factor jumps from Dmax or Dmin to 100% and they completely lose regulation while D=100%, since the input terminal is essentially resistively connected to the output terminal during the dropout condition.
While the Buck-boost converter doesn't really exhibit permanent dropout, it can easily suffer a voltage glitch during mode transitions whenever the converter switches from its Buck mode into its Buck-boost mode, or from its Buck-boost mode to its boost mode. Mode transitions occur whenever the converter changes from a circuit where two power devices are switching into one where four devices are switching, or vice versa.
To avoid the mode switching transition problem, a Buck boost converter can be run continuously in Buck-boost mode with all four power devices switching continuously, but then the efficiency is degraded under all input-output conditions and conversion ratios.
As stated previously, a charge pump is incapable of regulating voltage without the use of a series-connected linear regulator or a current source such as shown in FIGS. 12A through 12D to provide the regulation function. To maintain a high efficiency, however, a regulated charge pump cannot impose too much voltage across its series regulator, and must therefore change modes during varying input-output conditions as shown in FIG. 11B. As the voltage conversion ratio approaches unity, the most efficient operating mode is the 1× mode shown by curve 247 in FIG. 11B. Under the 1× mode the charge pump is not switching and a series connected linear regulator or current source must provide regulation.
Unfortunately, it is well known phenomenon that all linear regulators exhibit loss of regulation, i.e. dropout, whenever ΔV across the linear regulator's input and output terminals becomes too small. In essence, dropout occurs in a linear regulator because the loop gain of the amplifier performing regulation drops precipitously as its transistor pass element changes from acting as a current source to acting as a variable resistor. If the pass element is a bipolar transistor, the loss of gain occurs at small values of VCE as the device transitions from its active operating region into saturation. In many bipolar linear regulators, this dropout condition occurs at more than 400 mV.
In low-dropout linear regulators, a MOSFET capable of operating as a current source at a lower ΔV is substituted for the bipolar pass element, but the linear regulator still drops out at 200 to 300 mV as the power MOSFET pass element transitions from its saturation, i.e. constant current, region into its linear, i.e. resistive, region of operation.
In conclusion, prior-art non-isolated high-efficiency converters exhibit dropout at voltage conversion ratios approaching unity. Mode switching, loss of regulation and dropout can be avoided, but only by sacrificing efficiency. Isolated converters such as the flyback and forward converter are able to operate at high efficiencies near unity conversion without the need switching modes, but their use of physically-large tapped inductors, coupled inductors, and transformers precludes their application in most portable products.
Summary of Prior-Art Down-Up Converters
In conclusion, existing charge pump converters, Buck-boost switching regulators and other inductive switching regulators are not able to both step-up and step-down DC voltages efficiently, especially for conversion ratios near unity where Vin≈Vout. What is needed is an up-down converter that is efficient over a wide range of input and output voltages, and that does not need to change its operating mode as it approaches or operates near unity voltage conversion ratios, i.e. when Vout≈Vin. Furthermore, the converter should be free from dropout problems, maintaining high quality regulation even while biased with an output voltage within a 200 mV of its input, i.e. within the range Vout≈Vin±200 mV.